Back Many Integrated Core Catalan Intel MIC Spanish زئون فای Persian Intel MIC French Xeon Phi Hungarian Xeon Phi Japanese 제온 파이 Korean Intel Xeon Phi NB Xeon Phi Portuguese Xeon Phi Russian
 Xeon Phi 5100 without heatsink | |
| General information | |
|---|---|
| Launched | 2010 |
| Discontinued | 2020[1] |
| Marketed by | Intel |
| Designed by | Intel |
| Common manufacturer(s) |
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| Performance | |
| Max. CPU clock rate | 1.053 GHz to 1.7 GHz |
| Cache | |
| L1 cache | 32 KB per core |
| L2 cache | 512 KB per core |
| Architecture and classification | |
| Application | Supercomputers High-performance computing |
| Technology node | 45 nm transistors to 14 nm transistors (tri-gate) |
| Microarchitecture | Larrabee |
| Instruction set | x86-16 (except coprocessor form factor), IA-32, x86-64[2] |
| Extensions | |
| Physical specifications | |
| Cores |
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| Memory (RAM) |
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| Socket(s) | |
| Products, models, variants | |
| Core name(s) |
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| Model(s) |
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Xeon Phi[3] is a discontinued series of x86 manycore processors designed and made by Intel. It was intended for use in supercomputers, servers, and high-end workstations. Its architecture allowed use of standard programming languages and application programming interfaces (APIs) such as OpenMP.[4][5]
Xeon Phi launched in 2010. Since it was originally based on an earlier GPU design (codenamed "Larrabee") by Intel[6] that was cancelled in 2009,[7] it shared application areas with GPUs. The main difference between Xeon Phi and a GPGPU like Nvidia Tesla was that Xeon Phi, with an x86-compatible core, could, with less modification, run software that was originally targeted to a standard x86 CPU.
Initially in the form of PCI Express-based add-on cards, a second-generation product, codenamed Knights Landing, was announced in June 2013.[8] These second-generation chips could be used as a standalone CPU, rather than just as an add-in card.
In June 2013, the Tianhe-2 supercomputer at the National Supercomputer Center in Guangzhou (NSCC-GZ) was announced[9] as the world's fastest supercomputer (as of June 2023[update], it is No. 10[10]). It used Intel Xeon Phi coprocessors and Ivy Bridge-EP Xeon E5 v2 processors to achieve 33.86 petaFLOPS.[11]
The Xeon Phi product line directly competed with Nvidia's Tesla and AMD Radeon Instinct lines of deep learning and GPGPU cards. It was discontinued due to a lack of demand and Intel's problems with its 10nm node.[12]
- ^ Ian Cutress & Anton Shilov (7 May 2019). "The Larrabee Chapter Closes: Intel's Final Xeon Phi Processors Now in EOL". Retrieved 12 March 2020.
- ^ "Intel® Xeon Phi™ Coprocessor System Software Developers Guide" (PDF). Intel. 8 November 2012. p. 16. Archived (PDF) from the original on 21 April 2024. Retrieved 1 May 2024.
- ^ Cite error: The named reference
IntelXeonPhiNamewas invoked but never defined (see the help page). - ^ robert-reed (4 February 2013). "Best Known Methods for Using OpenMP on Intel Many Integrated Core (Intel MIC) Architecture". software.intel.com.
- ^ Jeffers, James; Reinders, James (1 March 2013). Intel Xeon Phi Coprocessor High Performance Programming. Morgan Kaufmann. ISBN 978-0124104143.
- ^ Hruska, Joel (8 May 2019). "Intel Quietly Kills Off Xeon Phi". ExtremeTech.
- ^ "Intel scraps graphics chip based on Larrabee". Reuters. 6 December 2009.
- ^ Sodani, Avinash; et al. (2016). "Knights Landing: Second-Generation Intel Xeon Phi Product". IEEE Micro. 36 (2): 34–46. doi:10.1109/MM.2016.25. S2CID 28837176.
- ^ "TOP500 - June 2013". TOP500. Retrieved 18 June 2013.
- ^ "June 2023 | TOP500 Supercomputer Sites". www.top500.org.
- ^ "Intel Powers the World's Fastest Supercomputer, Reveals New and Future High Performance Computing Technologies". Retrieved 21 June 2013.
- ^ W1zzard (24 July 2018). "Intel is Giving up on Xeon Phi - Eight More Models Declared End-Of-Life". TechPowerUp.
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